1. Field of the Invention
The present invention relates to a semiconductor device, and more specifically to a technology for preventing rewriting of a fuse circuit in which data defining inside circuit configuration is stored.
Priority is claimed on Japanese Patent Application No. 2006-277564, filed Oct. 11, 2006, the content of which is incorporated herein by reference.
2. Description of the Related Art
Formerly, semiconductor devices provided with fuse circuits for storing data which define the structure, such as word organization or redundancy structure, of inner circuits have been known. Among those semiconductor memories represented by dynamic random access memories (DRAMs), for example, there are product specifications in which the word organization of output data is ×4-bit organization, ×8-bit organization or the like. In order to cope with such plural product specifications, the fuse circuits inside the semiconductor devices are programmed before or after assembling packages in a manufacturing plant, so that the word organization of input and output data can be modified.
In these type of semiconductor memories, for example, in the default state, that is, the fuse circuit is unprogrammed, the word organization is set to ×8-bit organization, and the word organization is modified to ×4-bit organization by programming the fuse circuit. Accordingly, by testing the product as one having ×8-bit organization in the final screening test and then by programming the fuse circuit before shipping the product, a product in which the word organization complies with the demand of customers can be provided promptly. Moreover, since it becomes unnecessary to manufacture plural types of products having different word organizations, the total stock and accompanying cost can be reduced. Further, when the products are tested as ones having ×8-bit organization, testing time can be reduced by half compared with the case in which products are tested as ones having ×4-bit organization, so that accompanying cost can also be reduced.
Generally, what is called an anti-fuse is used as the above-described fuse circuit. The anti-fuse is a type of fuse which is electrically programmable and has such characteristics that it is normally in a high-resistance state (or open state), and is turned to a low-resistance state (or short circuit state) when a predetermined program voltage is applied (see Japanese Unexamined Patent Application No. 2002-42472). By using this anti-fuse, the fuse circuit of a semiconductor memory can be programmed even after it is assembled as a package. This type of fuse circuit is programmed before the semiconductor memory is shipped from the manufacturing plant by using a special command which is not open to users, and the users are not allowed to program the fuse circuit.
However, according to the above-described prior art, there is a possibility that after the semiconductor memory is shipped as a product from the manufacturing plant, a wrong timing signal, for example, may be applied to an external terminal of the semiconductor memory, so that the above-described special command to program the fuse circuit may be entered accidentally. In such a case, the circuit configuration of the product is modified contrary to the user's intention. In the above-described example, the word organization is modified to ×4-bit organization and consequently, the semiconductor memory becomes defective as a ×8-bit organization product.
This problem will be described in detail with reference to FIGS. 12 and 13. FIG. 12 illustrates a configuration of a conventional fuse circuit 10. In FIG. 12, 10-0, 10-1, . . . , 10-2 are fuse element circuits including anti-fuses. Among these circuits, the fuse element circuit 10-0 is to be programmed when the voltage of the internal electrical power source is adjusted, the fuse element circuit 10-1 is to be programmed when the word organization of the output data is modified, and the fuse element circuit 10-2 is to be programmed when the delay time of the inner circuit is adjusted. In FIG. 12, reference numeral 11 designates a control logic circuit which outputs program data for programming each fuse element circuit.
Operation of the conventional fuse circuit 10 will be described with reference to FIG. 13. In case the fuse element circuit 10-0 is to be programmed in order to adjust the voltage of the internal electrical power source of the semiconductor memory in the manufacturing plant prior to shipping, for example, a special command CMD1 is applied to the external terminal thereof from outside. This special command CMD1 is decoded by a command decoder in the semiconductor memory and the control logic circuit 11 outputs a signal PGM-0 to program the fuse element circuit 10-0 according to the decoded result. In this example, the fuse element circuit 10-1 is not programmed and the semiconductor memory is shipped as a ×8-bit organization product.
After shipping, if a special command CMD2 for programming the fuse element circuit 10-1 is entered accidentally due to an application of a wrong timing signal on the external terminal of the semiconductor memory, the control logic circuit 11 outputs a signal PGM-1 to program the fuse element circuit 10-1 based on the special command CMD2. Accordingly, the fuse element circuit 10-1 is misprogrammed, so that the word organization is modified to the ×4-bit organization from the ×8-bit organization. As a result, this semiconductor memory operates against a user's intention, thus becomes defective as a ×8-bit organization product.
Not only the above-described fuse circuits for modifying a circuit configuration relating to the word organization, but all fuse circuits provided in semiconductor devices such as a fuse circuit for storing defective address data in a redundancy circuit face similar problems concerning misprogramming.